View 74HCT4353_14516.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4353 Triple 2-channel analog multiplexer/demultiplexer with latch
Product specification File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
FEATURES * Wide analog input voltage range: 5 V * Low "ON" resistance: 80 (typ.) at VCC - VEE = 4.5 V 70 (typ.) at VCC - VEE = 6.0 V 60 (typ.) at VCC - VEE = 9.0 V * Logic level translation: to enable 5 V logic to communicate with 5 V analog signals * Typical "break before make" built in * Address latches provided * Output capability: non-standard * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT4353 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4353 are triple 2-channel analog multiplexers/demultiplexers with two common enable inputs (E1 and E2) and a latch enable input (LE). Each QUICK REFERENCE DATA VEE = GND = 0 V; Tamb = 25 C; tr = tf = 6 ns
74HC/HCT4353
multiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and select inputs (S1 to S3). Each multiplexer/demultiplexer contains two bidirectional analog switches, each with one side connected to an independent input/output (nY0 and nY1) and the other side connected to a common input/output (nZ). With E1 LOW and E2 HIGH, one of the two switches is selected (low impedance ON-state) by S1 to S3. The data at the select inputs may be latched by using the active LOW latch enable input (LE). When LE is HIGH, the latch is transparent. When either of the two enable inputs, E1 (active LOW) and E2 (active HIGH), is inactive, all analog switches are turned off. VCC and GND are the supply voltage pins for the digital control inputs (S1 to S3, LE, E1 and E2). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (nY0 and nY1, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).
TYPICAL SYMBOL tPZH/ tPZL tPHZ/ tPLZ CI CPD CS PARAMETER turn "ON" time E1, E2 or Sn to Vos turn "OFF" time E1, E2 or Sn to Vos input capacitance power dissipation capacitance per switch max. switch capacitance independent (Y) common (Z) Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + {(CL + CS) x VCC2 x fo} where: fi = input frequency in MHz CL = output load capacitance in pF fo = output frequency in MHz CS = max. switch capacitance in pF December 1990 2 5 8 5 8 pF pF notes 1 and 2 CONDITIONS HC CL = 50 pF; RL = 1 k; VCC = 5 V 29 20 3.5 23 HCT 21 22 3.5 23 ns ns pF pF UNIT
{(CL xCS) x VCC2 x fo} = sum of outputs VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information".
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
PIN DESCRIPTION PIN NO. 2, 1 5 6, 4 3, 14 7 8 9 10 11 15, 13, 12 16, 17 18 19 20 SYMBOL 2Y0, 2Y1 3Z 3Y0, 3Y1 n.c. E1 E2 VEE GND LE S1 to S3 1Y0, 1Y1 1Z 2Z VCC NAME AND FUNCTION independent inputs/outputs common input/output independent inputs/outputs not connected enable input (active LOW) enable input (active HIGH) negative supply voltage ground (0 V) latch enable input (active LOW) select inputs independent inputs/outputs common input/output common input/output positive supply voltage
74HC/HCT4353
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
FUNCTION TABLE INPUTS E1 H X L L L X Notes 1. Last selected channel "ON". 2. Selected channels latched. H = HIGH voltage level L = LOW voltage level X = don't care = HIGH-to-LOW LE transition APPLICATIONS * Analog multiplexing and demultiplexing * Digital multiplexing and demultiplexing * Signal gating E2 H L H H H X LE X X H H L Sn X X L H X X CHANNEL ON none none nY0 - nZ nY1 - nZ
(1) (2)
74HC/HCT4353
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
December 1990
4
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to VEE = GND (ground = 0 V) SYMBOL VCC IIK ISK IS IEE ICC; IGND Tstg Ptot PARAMETER DC supply voltage DC digital input diode current DC switch diode current DC switch current DC VEE current DC VCC or GND current storage temperature range power dissipation per package plastic DIL plastic mini-pack (SO) PS power dissipation per switch 750 500 100 mW mW mW -65 MIN. -0.5 MAX. +11.0 20 20 25 20 50 +150 UNIT V mA mA mA mA mA C CONDITIONS
74HC/HCT4353
for VI < -0.5 V or VI > VCC + 0.5 V for VS < -0.5 V or VS > VCC + 0.5 V for -0.5 V < VS < VCC + 0.5 V
for temperature range: -40 to +125 C 74HC/HCT above +70 C: derate linearly with 12 mW/K above +70 C: derate linearly with 8 mW/K
Note to ratings 1. To avoid drawing VCC current out of terminals nZ, when switch current flows in terminals nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no VCC current will flow out of terminals nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE. RECOMMENDED OPERATING CONDITIONS 74HC SYMBOL PARAMETER min. typ. VCC VCC VI VS Tamb Tamb t r, t f DC supply voltage VCC-GND DC supply voltage VCC-VEE DC input voltage range DC switch voltage range operating ambient temperature range operating ambient temperature range input rise and fall times 6.0 2.0 2.0 GND VEE -40 -40 5.0 5.0 max. 10.0 10.0 VCC VCC +85 +125 1000 500 400 250 min. 4.5 2.0 GND VEE -40 -40 typ. max. 5.0 5.0 5.5 10.0 VCC VCC +85 V V V V C see DC and AC CHARACTERISTICS VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V see Figs 6 and 7 see Figs 6 and 7 74HCT UNIT CONDITIONS
+125 C
6.0
500
ns
December 1990
5
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
MBA334
74HC/HCT4353
10 handbook, halfpage VCC - GND (V) 8 operating area 6
4
2
0
0
2
4
6
8 10 VCC - V EE (V)
Fig.6
Guaranteed operating area as a function of the supply voltages for 74HC4353.
Fig.7
Guaranteed operating area as a function of the supply voltages for 74HCT4353.
DC CHARACTERISTICS FOR 74HC/HCT For 74HC: VCC - GND or VCC - VEE = 2.0, 4.5, 6.0 and 9.0 V For 74HCT: VCC - GND = 4.5 and 5.5 V; VCC - VEE = 2.0, 4.5, 6.0 and 9.0 V Tamb (C) 74HC/HCT SYMBOL PARAMETER +25 min. RON ON resistance (peak) typ. - 100 90 70 150 80 70 60 150 90 80 65 - 9 8 6 - 180 160 130 - 140 120 105 - 160 140 120 -40 to +85 max. min. max. - 225 200 165 - 175 150 130 - 200 175 150 -40 to +125 min. max. - 270 240 195 - 210 180 160 - 240 210 180 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 0 0 0 -4.5 0 0 0 -4.5 0 0 0 -4.5 0 0 0 -4.5
100 VCC VIN 1000 to or 1000 VEE VIL 1000 100 VEE 1000 1000 1000
TEST CONDITIONS UNIT V CC VEE IS Vis (V) (V) (A)
VI
RON
ON resistance (rail)
VIH or VIL
RON
ON resistance
100 VCC VIH 1000 or 1000 VIL 1000
RON
maximum ON resistance between any two channels
VCC VIH to or VEE VIL
Notes to DC characteristics 1. At supply voltages (VCC - VEE) approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear. There it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 2. For test circuit measuring RON see Fig.8.
December 1990
6
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
DC CHARACTERISTICS FOR 74HC Voltages are referenced to GND (ground = 0 V) Tamb (C) 74HC SYMBOL PARAMETER +25 -40 to +85 max. -40 to +125 min.
1.5 3.15 4.2 6.3
74HC/HCT4353
TEST CONDITIONS UNIT VCC (V) 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0
6.0 0 10.0 0 10.0 0 VCC or GND
VEE (V)
VI
OTHER
min. typ. max. min. VIH
HIGH level input voltage
max. V
1.5 3.15 4.2 6.3
1.2 2.4 3.2 4.7 0.8 2.1 2.8 4.3 0.5 1.35 1.8 2.7 0.1 0.2 0.1
1.5 3.15 4.2 6.3
VIL
LOW level input voltage
0.5 1.35 1.8 2.7 1.0 2.0 1.0
0.5 1.35 1.8 2.7 1.0 2.0 1.0
V
II
input leakage current
analog switch OFF-state current per channel analog switch OFF-state current all channels analog switch ON-state current quiescent supply current
A
IS
A
VIH or VIL VIH or VIL VIH or VIL
VS = VCC - VEE (see Fig.10) VS = VCC - VEE (see Fig.10) VS = VCC - VEE
IS
0.1
1.0
1.0
A
10.0 0
IS
0.1
1.0
1.0
A
10.0 0
(see Fig.11)
ICC
8.0 16.0
80.0 160.0
160.0 320.0
A
6.0 0 10.0 0
VCC Vis = VEE or VCC; Vos = or GND VCC or VEE
December 1990
7
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER +25 -40 to +85 -40 to +125 max. 90 18 15 12 375 75 64 60 300 60 51 60 340 68 58 60 375 75 64 60 300 60 51 60 90 18 15 27 5 5 5 5 120 24 20 24 ns
74HC/HCT4353
TEST CONDITIONS UNIT V CC (V) 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 2.0 4.5 6.0 4.5 VEE OTHER (V) 0 RL = ; 0 CL = 50 pF (see Fig.18) 0 -4.5 0 RL = 1 k; 0 CL = 50 pF (see Fig.19) 0 -4.5 0 RL = 1 k; 0 CL = 50 pF 0 (see Fig.19) -4.5 0 RL = 1 k; 0 CL = 50 pF 0 (see Fig.19) -4.5 0 RL = 1 k; 0 CL = 50 pF (see Fig.19) 0 -4.5 0 RL = 1 k; 0 CL = 50 pF 0 (see Fig.19) -4.5 0 RL = 1 k; 0 CL = 50 pF 0 (see Fig.20) -4.5 0 RL = 1 k; 0 CL = 50 pF 0 (see Fig.20) -4.5 0 RL = 1 k; 0 CL = 50 pF 0 (see Fig.20) -4.5
min. typ. max. min. max. min. tPHL/ tPLH propagation delay Vis to Vos 14 5 4 4 61 22 18 18 55 20 16 17 61 22 18 17 66 24 19 19 55 20 16 19 60 12 10 18 5 5 5 5 80 16 14 16 17 6 5 8 -6 -2 -2 -3 11 4 3 6 60 12 10 8 250 50 43 40 200 40 34 40 225 45 38 40 250 50 43 40 200 40 34 40 75 15 13 23 5 5 5 5 100 20 17 20 75 15 13 10 315 63 54 50 250 50 43 50 280 56 48 50 315 63 54 50 250 50 43 50
tPZH/ tPZL
turn "ON" time E1; E2 to Vos
ns
tPZH/ tPZL
turn "ON" time LE to Vos
ns
tPZH/ tPZL
turn "ON" time Sn to Vos
ns
tPHZ/ tPLZ
turn "OFF" time E1; E2 to Vos
ns
tPHZ/ tPLZ
turn "OFF" time Sn to Vos; LE to Vos
ns
tsu
set-up time Sn to LE
ns
th
hold time Sn to LE
ns
tW
LE minimum pulse width HIGH
ns
December 1990
8
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
DC CHARACTERISTICS FOR 74HCT Voltages are referenced to GND (ground = 0 V) Tamb (C) 74HCT SYMBOL PARAMETER +25 -40 to +85 -40 to +125 min. 2.0 max. V 4.5 to 5.5 4.5 to 5.5 5.5 UNIT
74HC/HCT4353
TEST CONDITIONS VCC VEE VI (V) (V)
OTHER
min. typ. max. min. max. VIH HIGH level input voltage LOW level input voltage input leakage current analog switch OFF-state current per channel analog switch OFF-state current all channels analog switch ON-state current quiescent supply current 2.0 1.6 2.0
VIL
1.2
0.8
0.8
0.8
V
II
0.1
1.0
1.0
A
0
VCC or GND
IS
0.1
1.0
1.0
A
10.0 0
VIH or VIL VIH or VIL VIH or VIL
VS = VCC - VEE Fig.10 VS = VCC - VEE Fig.10 VS = VCC - VEE Fig.11
IS
0.1
1.0
1.0
A
10.0 0
IS
0.1
1.0
1.0
A
10.0 0
ICC
8.0 16.0
80.0 160.0
160.0 320.0
A
5.5 5.0
0 VCC Vis = VEE -5.0 or or VCC; GND Vos =
VCC or VEE ICC
additional quiescent supply current per input pin for unit load coefficient is 1 (note 1)
100 360
450
490
A
4.5 to 5.5
0
VCC -2.1 V
other inputs at VCC or GND
Note to HCT types 1. The value of additional quiescent supply current (ICC) for a unit load of 1 is given here. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT E1, E2 Sn LE UNIT LOAD COEFFICIENT 0.50 0.50 1.5
December 1990
9
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER +25 -40 to +85 -40 to +125 min. max. 18 12 83 68 75 60 68 60 75 68 75 60 75 60 60 60 68 68 18 22 5 5 24 24 ns
74HC/HCT4353
TEST CONDITIONS UNIT V CC (V) 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 VEE OTHER (V) 0 RL = ; -4.5 CL = 50 pF (see Fig.18) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.19) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.20) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.20) 0 RL = 1 k; -4.5 CL = 50 pF (see Fig.20)
min. typ. max. min. max. tPHL/ tPLH propagation delay Vis to Vos turn "ON" time E1 to Vos turn "ON" time E2 to Vos turn "ON" time LE to Vos turn "ON" time Sn to Vos turn "OFF" time E1 to Vos turn "OFF" time E2 to Vos turn "OFF" time LE to Vos turn "OFF" time Sn to Vos set-up time Sn to LE hold time Sn to LE LE minimum pulse width HIGH 12 15 5 5 16 16 5 4 26 22 22 18 21 17 25 19 23 19 27 23 19 19 22 22 7 9 0 -2 3 5 12 8 55 45 50 40 45 40 50 45 50 40 50 40 40 40 45 45 15 19 5 5 20 20 15 10 69 56 63 50 56 50 63 56 63 50 63 50 50 50 56 56
tPZH/ tPZL
ns
tPZH/ tPZL
ns
tPZH/ tPZL
ns
tPZH/ tPZL
ns
tPHZ/ tPLZ
ns
tPHZ/ tPLZ
ns
tPHZ/ tPLZ
ns
tPHZ/ tPLZ
ns
tsu
ns
th
ns
tW
ns
December 1990
10
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
74HC/HCT4353
Fig.8 Test circuit for measuring RON.
Fig.9
Typical RON as a function of input voltage Vis for Vis = 0 to VCC - VEE.
Fig.10 Test circuit for measuring OFF-state current.
Fig.11 Test circuit for measuring ON-state current.
December 1990
11
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT Recommended conditions and typical values GND = 0 V; Tamb = 25 C SYMBOL PARAMETER sine-wave distortion f = 1 kHz sine-wave distortion f = 10 kHz switch "OFF" signal feed-through crosstalk between any two switches/ multiplexers V(p-p) crosstalk voltage between control and any switch (peak-to-peak value) typ. 0.04 0.02 0.12 0.06 -50 -50 -60 -60 110 220 UNIT % % % % dB dB dB dB mV mV VCC (V) 2.25 4.5 2.25 4.5 2.25 4.5 2.25 4.5 4.5 4.5 VEE (V) -2.25 -4.5 -2.25 -4.5 -2.25 -4.5 -2.25 -4.5 0 -4.5 Vis(p-p) (V) 4.0 8.0 4.0 8.0 note 1 note 1
74HC/HCT4353
CONDITIONS RL = 10 k; CL = 50 pF (see Fig.14) RL = 10 k; CL = 50 pF (see Fig.14) RL = 600 ; CL = 50 pF f = 1 MHz (see Figs 12 and 15) RL = 600 ; CL = 50 pF; f = 1 MHz (see Fig.16) RL = 600 ; CL = 50 pF; f = 1 MHz (E1, E2 or Sn, square-wave between VCC and GND, tr = tf = 6 ns) (see Fig.17)
fmax CS
minimum frequency response (-3dB) maximum switch capacitance independent (Y) common (Z)
160 170 5 12
MHz MHz pF pF
2.25 4.5
-2.25 -4.5
note 2
RL = 50 ; CL = 10 pF (see Figs 13 and 14)
Notes to the AC characteristics 1. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ). 2. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
General note
Vis is the input voltage at an nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at an nYn or nZ terminal, whichever is assigned as an output.
Test conditions: VCC = 4.5 V; GND = 0 V; VEE = - 4.5 V; RL = 50 ; Rsource = 1 k.
Fig.12 Typical switch "OFF" signal feed-through as a function of frequency.
December 1990
12
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
74HC/HCT4353
Test conditions: VCC = 4.5 V; GND = 0 V; VEE = - 4.5 V; RL = 50 ; Rsource = 1 k.
Fig.13 Typical frequency response.
Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response.
Fig.15 Test circuit for measuring switch "OFF" signal feed-through.
(a) = channel ON condition
(b) channel OFF condition.
Fig.16 Test circuits for measuring crosstalk between any two switches/multiplexers.
The crosstalk is defined as follows (oscilloscope output):
Fig.17 Test circuit for measuring crosstalk between control and any switch.
December 1990
13
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
AC WAVEFORMS
74HC/HCT4353
(1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.18 Waveforms showing the input (Vis) to output (Vos) propagation delays.
Fig.19 Waveforms showing the turn-ON and turn-OFF times.
(1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.20 Waveforms showing the set-up and hold times from Sn inputs to LE input, and minimum pulse width of LE.
December 1990
14
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
TEST CIRCUIT AND WAVEFORMS
74HC/HCT4353
Conditions TEST tPZH tPZL tPHZ tPLZ others CL RT tr = = = SWITCH VEE VCC VEE VCC open Vis VCC VEE VCC VEE pulse FAMILY 74HC 74HCT AMPLITUDE VCC 3.0 V VM 50% 1.3 V tr; tf fmax; PULSE WIDTH < 2 ns < 2 ns OTHER 6 ns 6 ns
load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). termination resistance should be equal to the output impedance ZO of the pulse generator. tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor. Fig.21 Test circuit for measuring AC performance.
Conditions TEST tPZH tPZL tPHZ tPLZ others CL RT tr = = = SWITCH VEE VCC VEE VCC open Vis VCC VEE VCC VEE pulse FAMILY 74HC 74HCT AMPLITUDE VCC 3.0 V VM 50% 1.3 V tr; tf fmax; PULSE WIDTH < 2 ns < 2 ns OTHER 6 ns 6 ns
load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). termination resistance should be equal to the output impedance ZO of the pulse generator. tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor. Fig.22 Input pulse definitions.
December 1990
15
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer with latch
PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines".
74HC/HCT4353
December 1990
16

▲Up To Search▲

Price & Availability of 74HCT4353

	To Download 74HCT4353 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .